A General Framework for Accelerating Swarm Intelligence Algorithms on FPGAs, GPUs and Multi-core CPUs

Dalin Li, Lan Huang, Kangping Wang* (Corresponding Author), Wei Pang, You Zhou, Rui Zhang

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

7 Citations (Scopus)
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Swarm intelligence algorithms (SIAs) have demonstrated excellent performance when solving optimization problems including many real-world problems. However, because of their expensive computational cost for some complex problems, SIAs need to be accelerated effectively for better performance. This paper presents a high-performance general framework to accelerate SIAs (FASI). Different from the previous work which accelerate SIAs through enhancing the parallelization only, FASI considers both the memory architectures of hardware platforms and the dataflow of SIAs, and it reschedules the framework of SIAs as a converged dataflow to improve the memory access efficiency. FASI achieves higher acceleration ability by matching the algorithm framework to the hardware architectures. We also design deep optimized structures of the parallelization and convergence of FASI based on the characteristics of specific hardware platforms. We take the quantum behaved particle swarm optimization algorithm (QPSO) as a case to evaluate FASI. The results show that FASI improves the throughput of SIAs and provides better performance through optimizing the hardware implementations. In our experiments, FASI achieves a maximum of 290.7Mbit/s throughput which is higher than several existing systems, and FASI on FPGAs achieves a better speedup than that on GPUs and multi-core CPUs. FASI is up to 123 times and not less than 1.45 times faster in terms of optimization time on Xilinx Kintex Ultrascale xcku040 when compares to Intel Core i7-6700 CPU/ NVIDIA GTX1080 GPU. Finally, we compare the differences of deploying FASI on hardware platforms and provide some guidelines for promoting the acceleration performance according to the hardware architectures.
Original languageEnglish
Pages (from-to)72327 - 72344
Number of pages19
JournalIEEE Access
Early online date20 Nov 2018
Publication statusPublished - 2018

Bibliographical note

This work is supported by the National Natural Science Foundation of China (Grant Nos.61472159, 61572227, 61772227), Development Project of Jilin Province of China (Nos. 20160204022GX, 20170101006JC, 20170203002GX, 2017C030-1, 2017C033, 20180414012GH). This work is also supported in part by Premier-Discipline Enhancement Scheme supported by Zhuhai Government and Premier Key-Discipline Enhancement Scheme supported Guangdong Government Funds, and Jilin Provincial Key Laboratory of Big Data Intelligent Computing (20180622002JC).


  • Field programmable gate arrays
  • Multicore processing
  • Parallel programming
  • Particle swarm optimization
  • Pipeline processing


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