A Single-Chip Supervised Partial Self-Reconfigurable Architecture for Software Defined Radio

O. Faust; B. Sputh; D. Nathan; S. Rezgui; A. Weisensee; Alastair Robert Allen

Abstract

Software Defined Radio (SDR) technology seeks to solve the problem of multiple incompatible broadcast/telecom standards available in different locations, by having standard specific processing defined in software. This software will be downloaded and run on generic hardware, so that different broadcast/telecom standards can be supported by downloading corresponding software modules. Computing platform based SDR attempts to bridge the worlds of computing and broadcast/telecoms, by exposing the features and resources of computers to SDR and vice versa. However, such a concept results in certain architectural issues that need to be resolved. This paper describes the concept of Computing Platform based SDR, and the resulting issues & desired features of such a system. An innovative system architecture that involves the supervised partial self-reconfiguration of a single FPGA is proposed and detailed. Finally, a system test is conducted to illustrate and verify the reconfiguration operation.

Original language	English
Pages	191a
Number of pages	1
Publication status	Published - 22 Apr 2003
Event	International Parallel and Distributed Processing Symposium (IPDPS'03), 2003 - Nice, France Duration: 22 Apr 2003 → 25 Apr 2003

Conference

Conference	International Parallel and Distributed Processing Symposium (IPDPS'03), 2003
Country/Territory	France
City	Nice
Period	22/04/03 → 25/04/03

Cite this

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title = "A Single-Chip Supervised Partial Self-Reconfigurable Architecture for Software Defined Radio",

abstract = "Software Defined Radio (SDR) technology seeks to solve the problem of multiple incompatible broadcast/telecom standards available in different locations, by having standard specific processing defined in software. This software will be downloaded and run on generic hardware, so that different broadcast/telecom standards can be supported by downloading corresponding software modules. Computing platform based SDR attempts to bridge the worlds of computing and broadcast/telecoms, by exposing the features and resources of computers to SDR and vice versa. However, such a concept results in certain architectural issues that need to be resolved. This paper describes the concept of Computing Platform based SDR, and the resulting issues & desired features of such a system. An innovative system architecture that involves the supervised partial self-reconfiguration of a single FPGA is proposed and detailed. Finally, a system test is conducted to illustrate and verify the reconfiguration operation.",

author = "O. Faust and B. Sputh and D. Nathan and S. Rezgui and A. Weisensee and Allen, {Alastair Robert}",

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T1 - A Single-Chip Supervised Partial Self-Reconfigurable Architecture for Software Defined Radio

AU - Faust, O.

AU - Sputh, B.

AU - Nathan, D.

AU - Rezgui, S.

AU - Weisensee, A.

AU - Allen, Alastair Robert

PY - 2003/4/22

Y1 - 2003/4/22

N2 - Software Defined Radio (SDR) technology seeks to solve the problem of multiple incompatible broadcast/telecom standards available in different locations, by having standard specific processing defined in software. This software will be downloaded and run on generic hardware, so that different broadcast/telecom standards can be supported by downloading corresponding software modules. Computing platform based SDR attempts to bridge the worlds of computing and broadcast/telecoms, by exposing the features and resources of computers to SDR and vice versa. However, such a concept results in certain architectural issues that need to be resolved. This paper describes the concept of Computing Platform based SDR, and the resulting issues & desired features of such a system. An innovative system architecture that involves the supervised partial self-reconfiguration of a single FPGA is proposed and detailed. Finally, a system test is conducted to illustrate and verify the reconfiguration operation.

AB - Software Defined Radio (SDR) technology seeks to solve the problem of multiple incompatible broadcast/telecom standards available in different locations, by having standard specific processing defined in software. This software will be downloaded and run on generic hardware, so that different broadcast/telecom standards can be supported by downloading corresponding software modules. Computing platform based SDR attempts to bridge the worlds of computing and broadcast/telecoms, by exposing the features and resources of computers to SDR and vice versa. However, such a concept results in certain architectural issues that need to be resolved. This paper describes the concept of Computing Platform based SDR, and the resulting issues & desired features of such a system. An innovative system architecture that involves the supervised partial self-reconfiguration of a single FPGA is proposed and detailed. Finally, a system test is conducted to illustrate and verify the reconfiguration operation.

M3 - Abstract

SP - 191a

T2 - International Parallel and Distributed Processing Symposium (IPDPS'03), 2003

Y2 - 22 April 2003 through 25 April 2003

ER -

A Single-Chip Supervised Partial Self-Reconfigurable Architecture for Software Defined Radio

Abstract

Conference

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